SystemVerilog wait fork

wait fork

wait fork; causes the process to block until the completion of all processes started from fork blocks.

wait fork example

In the below example,

after the completion of Process-1 (i.e, after 5ns) fork-join_any will get unblocked, the $finish will get called and it ends the simulation.
The simulation will get ended in the middle of the execution of process-2, this can be avoided with the use of wait-fork.

The problem in this example is overcome in example-2 with the use of wait fork;

module wait_fork;

  initial begin
    $display("-----------------------------------------------------------------");
    fork
      //Process-1
      begin
        $display($time,"\tProcess-1 Started");
        #5;
        $display($time,"\tProcess-1 Finished");
      end

      //Process-2
      begin
        $display($time,"\tProcess-2 Started");
        #20;
        $display($time,"\tProcess-2 Finished");
      end
    join_any
    $display("-----------------------------------------------------------------");
    $finish; //ends the simulation
  end
endmodule

Simulator Output

-----------------------------------------------------------------
0 Process-1 Started
0 Process-2 Started
5 Process-1 Finished
-----------------------------------------------------------------

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wait fork example 2

In the below example,

wait fork will wait for the completion of the second thread in the fork-join_any.
for better understanding compare the result of Example-1 and Example-2

module wait_fork;

  initial begin
    $display("-----------------------------------------------------------------");
    fork
      //Process-1
      begin
        $display($time,"\tProcess-1 Started");
        #5;
        $display($time,"\tProcess-1 Finished");
      end

      //Process-2
      begin
        $display($time,"\tProcess-2 Started");
        #20;
        $display($time,"\tProcess-2 Finished");
      end
    join_any
     wait fork; //waiting for the completion of active fork threads     
    $display("-----------------------------------------------------------------");
    $finish; //ends the simulation
  end
endmodule

Simulator Output

-----------------------------------------------------------------
0 Process-1 Started
0 Process-2 Started
5 Process-1 Finished
20 Process-2 Finished
-----------------------------------------------------------------

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