-: Tutorials with links to example codes on EDA Playground :-
 EDA Playground – Edit, save, simulate, synthesize SystemVerilog, Verilog, VHDL and other HDLs from your web browser.

 SYSTEM VERILOG

SystemVerilog Tutorial Interview Questions
SystemVerilog Quiz Code Library
About TestBench Adder TB Example
Memory Model TB Example How …. ?

 UVM

UVM Tutorial UVM Callback Tutorial
UVM Interview Questions About UVM TestBench
UVM TestBench Example UVM TLM Tutorial
UVM Event Tutorial UVM RAL Tutorial

 SYSTEM-C

SystemC Tutorial SystemC Interview Questions
SystemC Quiz

 ASIC VERIFICATION

ASIC Verification Interview Questions SOC Verification Interview Questions
AMBA AHB & AXI

 GENERAL

Basic GVIM/VIM Commands Verilog Codes