Static Constraints in SystemVerilog

SystemVerilog static constraints are similar to static class properties. A constraint block can be defined as static by including the static keyword in its definition. constraint block with the static keyword followed by constraint keyword is called as a static constraint. the static constraint is shared across all the class instances.

• only the mode change of static constraint will get affected in all the instances of a class
• mode change is enable or disable of a constraint by constrain_mode() method
• a static class can be enabled or disabled by any object handle of its class, mode change with one object handle will reflect all other objects of same class type

Static constraint syntax

static constraint constraint_name { ....; }

Static constraint examples

turn off non-static constraint

In the below example,
The class packet has two instances pkt1 and pkt2. constraint addr_range is defined to control the value of random variable addr.
On randomization, pkt1.addr and pkt2.addr will take value based on the constraint.
The constraint is disabled using a pkt2 handle. As constraint is non-static only for pkt2 constraint will get disabled. On randomization, pkt1.addr will get value based on the constraint.

class packet;
  rand  bit [7:0] addr;
  
  constraint addr_range { addr == 5; }
endclass

module static_constr;
  initial begin
    packet pkt1;
    packet pkt2;
    pkt1 = new();
    pkt2 = new();
    
    $display("Before disabling constraint");    
    pkt1.randomize();
    $display("\tpkt1.addr = %0d",pkt1.addr);
    pkt2.randomize();
    $display("\tpkt2.addr = %0d",pkt2.addr);  
    
    pkt2.addr_range.constraint_mode(0);
    
    $display("After disabling constraint");
    pkt1.randomize();
    $display("\tpkt1.addr = %0d",pkt1.addr);
    pkt2.randomize();
    $display("\tpkt2.addr = %0d",pkt2.addr);      
  end

Simulator Output

Before disabling constraint
pkt1.addr = 5
pkt2.addr = 5
After disabling constraint
pkt1.addr = 5
pkt2.addr = 134

Click to execute on   

turn off static constraint

The example below is the same as the above example, the only change is the constraint is made as static.
The constraint is disabled by using one of the object handles. as the constraint is static in nature, the constraint will get disabled for both the objects.

class packet;
  rand  bit [7:0] addr;
  
  static constraint addr_range { addr == 5; }
endclass

module static_constr;
  initial begin
    packet pkt1;
    packet pkt2;
    pkt1 = new();
    pkt2 = new();

    $display("Before disabling constraint");
    pkt1.randomize();
    $display("\tpkt1.addr = %0d",pkt1.addr);
    pkt2.randomize();
    $display("\tpkt2.addr = %0d",pkt2.addr);    
    
    pkt2.addr_range.constraint_mode(0);
    
    $display("After disabling constraint");
    pkt1.randomize();
    $display("\tpkt1.addr = %0d",pkt1.addr);
    pkt2.randomize();
    $display("\tpkt2.addr = %0d",pkt2.addr);     
  end
endmodule

Simulator Output

Before disabling constraint
pkt1.addr = 5
pkt2.addr = 5
After disabling constraint
pkt1.addr = 22
pkt2.addr = 134

Click to execute on   

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