UVM Monitor

• The user-defined monitor is extended from uvm_monitor, uvm_monitor is inherited by uvm_component
• A monitor is a passive entity that samples the DUT signals through the virtual interface and converts the signal level activity to the transaction level
• Monitor samples DUT signals but does not drive them

The monitor should have an analysis port (TLM port) and a virtual interface handle that points to DUT signals.

Writing Monitor :

1. The monitor is written by extending the UVM_MONITOR,

class mem_monitor extends uvm_monitor;

  `uvm_component_utils(mem_monitor)

  // new - constructor
  function new (string name, uvm_component parent);
    super.new(name, parent);
    trans_collected = new();
    item_collected_port = new("item_collected_port", this);
  endfunction : new

endclass : mem_monitor

2. Declare virtual interface,

  // Virtual Interface
  virtual mem_if vif;

3. Connect interface to Virtual interface by using get method,

  function void build_phase(uvm_phase phase);
    super.build_phase(phase);
    if(!uvm_config_db#(virtual mem_if)::get(this, "", "vif", vif))
       `uvm_fatal("NOVIF",{"virtual interface must be set for: ",get_full_name(),".vif"});
  endfunction: build_phase

4. Declare analysis port,

  uvm_analysis_port #(mem_seq_item) item_collected_port;

5. Declare seq_item handle, Used as a place holder for sampled signal activity,

  mem_seq_item trans_collected;

6. Add Sampling logic in run_phase,

7. After sampling, by using the write method send the sampled transaction packet to the scoreboard,

  item_collected_port.write(trans_collected);

 Complete monitor code,

class mem_monitor extends uvm_monitor;

  // Virtual Interface
  virtual mem_if vif;

  uvm_analysis_port #(mem_seq_item) item_collected_port;

  // Placeholder to capture transaction information.
  mem_seq_item trans_collected;

  `uvm_component_utils(mem_monitor)

  // new - constructor
  function new (string name, uvm_component parent);
    super.new(name, parent);
    trans_collected = new();
    item_collected_port = new("item_collected_port", this);
  endfunction : new

  function void build_phase(uvm_phase phase);
    super.build_phase(phase);
    if(!uvm_config_db#(virtual mem_if)::get(this, "", "vif", vif))
       `uvm_fatal("NOVIF",{"virtual interface must be set for: ",get_full_name(),".vif"});
  endfunction: build_phase

  // run phase
  virtual task run_phase(uvm_phase phase);
    item_collected_port.write(trans_collected);
  endtask : run_phase

endclass : mem_monitor

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